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regarding the change of names mentioned in the document, such as hitachi electric and hitachi xx, to renesas technology corp. the semiconductor operations of mitsubishi electric and hitachi were transferred to renesas technology corporation on april 1st 2003. these operations include microcomputer, logic, analog and discrete devices, and memory chips other than drams (flash memory, srams etc.) accordingly, although hitachi, hitachi, ltd., hitachi semiconductors, and other hitachi brand names are mentioned in the document, these names have in fact all been changed to renesas technology corp. thank you for your understanding. except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. renesas technology home page: http://www.renesas.com renesas technology corp. customer support dept. april 1, 2003 to all our customers
cautions keep safety first in your circuit designs! 1. renesas technology corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corporation product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas technology corporation or a third party. 2. renesas technology corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by renesas technology corporation without notice due to product improvements or other reasons. it is therefore recommended that customers contact renesas technology corporation or an authorized renesas technology corporation product distributor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by renesas technology corporation by various means, including the renesas technology corporation semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact renesas technology corporation or an authorized renesas technology corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corporation is necessary to reprint or reproduce in whole or in part these materials. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. 8. please contact renesas technology corporation for further details on these materials or the products contained therein.
hm62v8512cts series 4 m sram (512-kword 8-bit) ade-203-1258a (z) rev. 1.0 jul. 23, 2001 description the hitachi hm62v8512cts series is a 4-mbit static ram organized 512-kword 8-bit. hm62v8512cts series has realized higher density, higher performance and low power consumption by employing cmos process technology (6-transistor memory cell). it offers low power standby power dissipation; therefore, it is suitable for battery backup system. it is packaged in tsop i is available for high density surface mounting. features single 3.0 v supply: 2.7 v to 3.6 v access time: 55/70 ns (max) power dissipation ? active: 6.0 mw/mhz (typ) ? standby: 2.4 m w (typ) completely static memory. no clock or timing strobe required equal access and cycle times common data input and output: three state output directly lv-ttl compatible: all inputs battery backup operation
hm62v8512cts series 2 ordering information type no. access time package HM62V8512CLTS-5 hm62v8512clts-7 55 ns 70 ns 8 13.4 mm 32-pin plastic tsopi (tfp-32dc) HM62V8512CLTS-5sl hm62v8512clts-7sl 55 ns 70 ns
hm62v8512cts series 3 pin arrangement 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 a11 a9 a8 a13 we a17 a15 v cc a18 a16 a14 a12 a7 a6 a5 a4 oe a10 cs i/o7 i/o6 i/o5 i/o4 i/o3 v ss i/o2 i/o1 i/o0 a0 a1 a2 a3 (top view) 32-pin tsop (normal type tsop) pin description pin name function a0 to a18 address input i/o0 to i/o7 data input/output cs chip select oe output enable we write enable v cc power supply v ss ground nc no connection
hm62v8512cts series 4 block diagram i/o0 i/o7 cs we oe a3 a2a1a0 a6 a5 v v cc ss row decoder memory matrix 2,048 2,048 column i/o column decoder input data control timing pulse generator read/write control a4 a7 a11 a9 a8 a15 a18 a10 a13 a17 a16 a14 a12 lsb msb lsb msb
hm62v8512cts series 5 function table we cs oe mode v cc current dout pin ref. cycle h not selected i sb , i sb1 high-z h l h output disable i cc high-z h l l read i cc dout read cycle l l h write i cc din write cycle (1) l l l write i cc din write cycle (2) note: : h or l absolute maximum ratings parameter symbol value unit power supply voltage v cc ?.5 to +4.6 v voltage on any pin relative to v ss v t ?.5* 1 to v cc + 0.5* 2 v power dissipation p t 1.0 w operating temperature topr ?0 to +70 c storage temperature tstg ?5 to +125 c storage temperature under bias tbias ?0 to +85 c notes: 1. v t min: ?.0 v for pulse half-width 30 ns. 2. maximum voltage is 4.6 v. recommended dc operating conditions (ta = ?0 to +70 c) parameter symbol min typ max unit supply voltage v cc 2.7 3.0 3.6 v v ss 000v input high voltage v ih 2.0 v cc + 0.3 v input low voltage v il ?.3* 1 0.8 v note: 1. v il min: ?.0 v for pulse half-width 30 ns.
hm62v8512cts series 6 dc characteristics parameter symbol min typ* 1 max unit test conditions input leakage current |i li | 1 m a vin = v ss to v cc output leakage current |i lo | 1 m a cs = v ih or oe = v ih or we = v il , v i/o = v ss to v cc operating power supply current: dc i cc 5 10 ma cs = v il , others = v ih /v il , i i/o = 0 ma operating power supply current hm62v8512cts-5 i cc1 8 25 ma min cycle, duty = 100% cs = v il , others = v ih /v il i i/o = 0 ma hm62v8512cts-7 i cc1 7 25 ma i cc2 2 5 ma cycle time = 1 m s, duty = 100% i i/o = 0 ma, cs 0.2 v v ih 3 v cc ?0.2 v, v il 0.2 v standby power supply current: dc i sb 0.1 0.3 ma cs = v ih standby power supply current (1): dc i sb1 0.8* 2 20* 2 m a vin 3 0 v, cs 3 v cc ?0.2 v 0.8* 3 10* 3 m a output low voltage v ol 0.4 v i ol = 2.1 ma 0.2 v i ol = 100 m a output high voltage v oh v cc ?0.2 v i oh = ?00 m a 2.4 v i oh = ?.0 ma notes: 1. typical values are at v cc = 3.0 v, ta = +25 c and specified loading, and not guaranteed. 2. this characteristics is guaranteed only for l version. 3. this characteristics is guaranteed only for l-sl version. capacitance (ta = +25 c, f = 1 mhz) parameter symbol typ max unit test conditions input capacitance* 1 cin 8 pf vin = 0 v input/output capacitance* 1 c i/o ?0pfv i/o = 0 v note: 1. this parameter is sampled and not 100% tested.
hm62v8512cts series 7 ac characteristics (ta = ?0 to +70 c, v cc = 2.7 v to 3.6 v, unless otherwise noted.) test conditions input pulse levels: 0.4 v to 2.4 v input rise and fall time: 5 ns input timing reference levels: 1.4 v output timing reference level: 1.4 v/1.4 v(hm62v8512cts-5) 0.8 v/2.0 v(hm62v8512cts-7) output load: see figure (including scope & jig) dout 500 1.4 v 50 pf w read cycle hm62v8512cts -5 -7 parameter symbol min max min max unit notes read cycle time t rc 55 70 ns address access time t aa 55 70 ns chip select access time t co 55 70 ns output enable to output valid t oe 30 35 ns chip selection to output in low-z t lz 10 10 ns 2 output enable to output in low-z t olz 55ns2 chip deselection to output in high-z t hz 0 20 0 30 ns 1, 2 output disable to output in high-z t ohz 0 20 0 30 ns 1, 2 output hold from address change t oh 10 10 ns
hm62v8512cts series 8 write cycle hm62v8512cts -5 -7 parameter symbol min max min max unit notes write cycle time t wc 55 70 ns chip selection to end of write t cw 50 60 ns 4 address setup time t as 00ns5 address valid to end of write t aw 50 60 ns write pulse width t wp 40 50 ns 3, 12 write recovery time t wr 00ns6 we to output in high-z t whz 0 20 0 30 ns 1, 2, 7 data to write time overlap t dw 25 30 ns data hold from write time t dh 00ns output active from output in high-z t ow 55ns2 output disable to output in high-z t ohz 0 20 0 30 ns 1, 2, 7 notes: 1. t hz , t ohz and t whz are defined as the time at which the outputs achieve the open circuit?onditions and are not referred to output voltage levels. 2. this parameter is sampled and not 100% tested. 3. a write occurs during the overlap (t wp ) of a low cs and a low we . a write begins at the later transition of cs going low or we going low. a write ends at the earlier transition of cs going high or we going high. t wp is measured from the beginning of write to the end of write. 4. t cw is measured from cs going low to the end of write. 5. t as is measured from the address valid to the beginning of write. 6. t wr is measured from the earlier of we or cs going high to the end of write cycle. 7. during this period, i/o pins are in the output state so that the input signals of the opposite phase to the outputs must not be applied. 8. if the cs low transition occurs simultaneously with the we low transition or after the we transition, the output remain in a high impedance state. 9. dout is the same phase of the write data of this write cycle. 10. dout is the read data of next address. 11. if cs is low during this period, i/o pins are in the output state. therefore, the input signals of the opposite phase to the outputs must not be applied to them. 12. in the write cycle with oe low fixed, t wp must satisfy the following equation to avoid a problem of data bus contention. t wp 3 t dw min + t whz max
hm62v8512cts series 9 timing waveforms read timing waveform ( we = v ih ) t aa t co t rc t lz t oe t olz t hz t ohz valid data address cs oe dout t oh
hm62v8512cts series 10 write timing waveform (1) ( oe clock) t wc t cw t wp t as t ohz t dw t dh t aw t wr *8 address oe cs we dout din valid data
hm62v8512cts series 11 write timing waveform (2) ( oe low fixed) address cs we dout din t wc t cw t wr t aw t wp t as t whz t ow t oh t dw t dh *11 *9 *10 *8 valid data
hm62v8512cts series 12 low v cc data retention characteristics (ta = ?0 to +70 c) parameter symbol min typ max unit test conditions* 3 v cc for data retention v dr 2v cs 3 v cc ?0.2 v, vin 3 0 v data retention current i ccdr 0.8* 4 20* 1 m av cc = 3.0 v, vin 3 0 v cs 3 v cc ?0.2 v 0.8* 4 10* 2 m a chip deselect to data retention time t cdr 0 ns see retention waveform operation recovery time t r t rc * 5 ns notes: 1. for l-version and 10 m a (max.) at ta = ?0 to +40 c. 2. for l-sl-version and 3 m a (max.) at ta = ?0 to +40 c. 3. cs controls address buffer, we buffer, oe buffer, and din buffer. in data retention mode, vin levels (address, we , oe , i/o) can be in the high impedance state. 4. typical values are at v cc = 3.0 v, ta = +25 c and specified loading, and not guaranteed. 5. t rc = read cycle time. low v cc data retention timing waveform ( cs controlled) cc v 2.7 v 2.0 v 0 v cs t cdr t r cs v ?0.2 v cc 3 dr v data retention mode
hm62v8512cts series 13 package dimensions hm62v8512clts series (tfp-32dc) hitachi code jedec eiaj mass (reference value) tfp-32dc 0.23 g *dimension including the plating thickness base material dimension 0.10 0.08 m 0.50 8.00 *0.22 0.08 13.40 0.30 1.20 max 11.80 32 116 17 *0.17 0.05 0 e 5 8.20 max 0.43 max 0.50 0.10 0.80 0.20 0.06 0.15 0.04 0.13 +0.07 e0.08 as of january, 2001 unit: mm
hm62v8512cts series 14 cautions 1. hitachi neither warrants nor grants licenses of any rights of hitachi? or any third party? patent, copyright, trademark, or other intellectual property rights for information contained in this document. hitachi bears no responsibility for problems that may arise with third party? rights, including intellectual property rights, in connection with use of the information contained in this document. 2. products and product specifications may be subject to change without notice. confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. hitachi makes every attempt to ensure that its products are of high quality and reliability. however, contact hitachi? sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. design your application so that the product is used within the ranges guaranteed by hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the hitachi product. 5. this product is not designed to be radiation resistant. 6. no one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from hitachi. 7. contact hitachi? sales office for any questions regarding this document or hitachi semiconductor products. hitachi, ltd. semiconductor & integrated circuits nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan tel: (03) 3270-2111 fax: (03) 3270-5109 copyright ?hitachi, ltd., 2001. all rights reserved. printed in japan. hitachi asia ltd. hitachi tower 16 collyer quay #20-00 singapore 049318 tel : <65>-538-6533/538-8577 fax : <65>-538-6933/538-3877 url : http://semiconductor.hitachi.com.sg url http://www.hitachisemiconductor.com/ hitachi asia ltd. (taipei branch office) 4/f, no. 167, tun hwa north road hung-kuo building taipei (105), taiwan tel : <886>-(2)-2718-3666 fax : <886>-(2)-2718-8180 telex : 23222 has-tp url : http://www.hitachi.com.tw hitachi asia (hong kong) ltd. group iii (electronic components) 7/f., north tower world finance centre, harbour city, canton road tsim sha tsui, kowloon hong kong tel : <852>-(2)-735-9218 fax : <852>-(2)-730-0281 url : http://semiconductor.hitachi.com.hk hitachi europe gmbh electronic components group dornacher stra? 3 d-85622 feldkirchen postfach 201,d-85619 feldkirchen germany tel: <49> (89) 9 9180-0 fax: <49> (89) 9 29 30 00 hitachi europe ltd. electronic components group whitebrook park lower cookham road maidenhead berkshire sl6 8ya, united kingdom tel: <44> (1628) 585000 fax: <44> (1628) 585200 hitachi semiconductor (america) inc. 179 east tasman drive san jose,ca 95134 tel: <1> (408) 433-1990 fax: <1>(408) 433-0223 for further information write to: colophon 5.0

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